Browse / Emulation: FPGA & Hardware Recreations
Apple IIgs core for MiSTer FPGA
| Year | 2026 |
|---|---|
| Publisher | MiSTer-devel |
| Developers | MiSTer-devel contributors |
| Other Requirements | A MiSTer FPGA (DE10-Nano) with SDRAM. ROM images. |
| Release Status | Open source, initial public release July 2026 |
About
A Verilog recreation of the IIGS for the MiSTer platform, released in July 2026. It runs a cycle-exact 65C816 at the stock 2.86 MHz (RAM refresh delays included), has an integrated ZipGS-style accelerator with the software register unlocks, and was tuned against Clemens, KEGS, MAME and real hardware. Not emulation in the software sense: the logic runs on the FPGA, with real-time behaviour that software emulators approximate.
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